
The AD9959 offers four direct digital synthesizer cores, allowing you to control frequency, phase, and amplitude independently for each channel. With the ability to handle up to 16 levels of modulation, whether it's frequency, phase, or amplitude, it brings flexibility to your designs. Since all channels share the same system clock, they stay synchronized, ensuring smooth operation across multiple channels. Moreover, if you're working with more than one AD9959, you can easily synchronize several devices, making it ideal for complex setups.

| Pin No. | Mnemonic | I/O | Description |
| 1 | SYNC_IN | I | Used to Synchronize Multiple AD9959 Devices. Connects to the SYNC_OUT pin of the master AD9959 device. |
| 2 | SYNC_OUT | O | Used to Synchronize Multiple AD9959 Devices. Connects to the SYNC_IN pin of the slave AD9959 device. |
| 3 | MASTER_RESET | I | Active High Reset Pin. Asserting the MASTER_RESET pin forces the AD9959 internal registers to their default state. |
| 4 | PWR_DWN_CTL | I | External Power-Down Control. |
| 5, 7, 11, 15, 19, 21, 26, 31, 33, 37, 39 | AVDD | I | Analog Power Supply Pins (1.8V). |
| 6, 10, 12, 16, 18, 20, 25, 28, 32, 34, 38 | AGND | I | Analog Ground Pins. |
| 44, 56 | DVDD | I | Digital Power Supply Pins (1.8V). |
| 45, 55 | DGND | I | Digital Power Ground Pins. |
| 8 | CH2_IOUT | O | True DAC Output. Terminates into AVDD. |
| 9 | CH2_IOUT | O | Complementary DAC Output. Terminates into AVDD. |
| 13 | CH3_IOUT | O | True DAC Output. Terminates into AVDD. |
| 14 | CH3_IOUT | O | Complementary DAC Output. Terminates into AVDD. |
| 17 | DAC_RSET | I | Establishes the Reference Current for All DACs. A 1.91 kΩ resistor (nominal) is connected from Pin 17 to AGND. |
| 22 | REF_CLK | I | Complementary Reference Clock/Oscillator Input. When the REF_CLK is operated in single-ended mode, this pin should be decoupled to AVDD or AGND with a 0.1 µF capacitor. |
| 23 | REF_CLK | I | Reference Clock/Oscillator Input. When the REF_CLK is operated in single-ended mode, this is the input. See the Modes of Operation section for the reference clock configuration. |
| Pin No. | Mnemonic | I/O | Description |
| 24 | CLK_MODE_SEL | I | Control Pin for the Oscillator Section. Caution: Do not drive this pin beyond 1.8V. When high (1.8V), the oscillator section is enabled to accept a crystal as the REF_CLK source. When low, the oscillator section is bypassed. |
| 27 | LOOP_FILTER | I | Connects to the external zero compensation network of the PLL loop filter. Typically, the network consists of a 0Ω resistor in series with a 680pF capacitor tied to AVDD. |
| 29 | CH0_IOUT | O | Complementary DAC Output. Terminates into AVDD. |
| 30 | CH0_IOUT | O | True DAC Output. Terminates into AVDD. |
| 35 | CH1_IOUT | O | Complementary DAC Output. Terminates into AVDD. |
| 36 | CH1_IOUT | O | True DAC Output. Terminates into AVDD. |
| 40 to 43 | P0 to P3 | I | Data pins used for modulation (FSK, PSK, ASK), to start/stop the sweep accumulators or used to ramp up/ramp down the output amplitude. The data is synchronous to the SYNC_CLK (Pin 54). Data inputs must meet the setup and hold time requirements of SYNC_CLK. The functionality of these pins is controlled by the profile pin configuration (PPC) bits (FR1[14:12]). |
| 46 | I/O_UPDATE | I | A rising edge transfers data from the serial I/O port buffer to active registers. I/O_UPDATE is synchronous to the SYNC_CLK (Pin 54). I/O_UPDATE must meet the setup and hold time requirements of SYNC_CLK to guarantee a fixed pipeline delay of data to the DAC output; otherwise, ±1 SYNC_CLK period of pipeline uncertainty exists. The minimum pulse width is one SYNC_CLK period. |
| 47 | CS\ | I | Active Low Chip Select. Allows multiple devices to share a common I/O bus (SPI). |
| 48 | SCLK | I | Serial Data Clock for I/O operations. Data bits are written on the rising edge of SCLK and read on the falling edge of SCLK. |
| 49 | DVDD_I/O | I | 3.3V Digital Power Supply for SPI Port and Digital I/O. |
| 50 | SDIO_0 | I/O | Data Pin SDIO_0 is dedicated to the serial port I/O only. |
| 51, 52 | SDIO_1, SDIO_2 | I/O | Data Pin SDIO_1 and Data Pin SDIO_2 can be used for the serial I/O port or used to initiate a ramp-up/ramp-down (RU/RD) of the DAC Output amplitude. |
| 53 | SDIO_3 | I/O | Data Pin SDIO_3 can be used for the serial I/O port or to initiate a ramp-up/ramp-down (RU/RD) of the DAC output amplitude. In single-bit or 2-bit modes, SDIO_3 is used for SYNC_I/O. If the SYNC_I/O function is not used, tie it to ground or logic 0. Do not let SDIO_3 float in single-bit or 2-bit modes. |
| 54 | SYNC_CLK | O | The SYNC_CLK runs at one-fourth the system clock rate; it can be disabled. I/O_UPDATE or data (Pin 40 to Pin 43) is synchronous to SYNC_CLK. To guarantee a fixed pipeline delay of data to DAC output, I/O_UPDATE or data (Pin 40 to Pin 43) must meet the setup and hold time requirements to the rising edge of SYNC_CLK; otherwise, ±1 SYNC_CLK period of uncertainty occurs. |



Technical specifications, attributes, parameters, and comparable parts for the Analog Devices Inc. AD9959BCPZ.
| Type | Parameter |
| Lifecycle Status | |
| Factory Lead Time | 8 Weeks |
| Contact Plating | Tin |
| Mount | Surface Mount |
| Mounting Type | Surface Mount |
| Package / Case | 56-VFQFN Exposed Pad, CSP |
| Number of Pins | 56 |
| Operating Temperature | -40°C to 85°C |
| Packaging | Tray |
| JESD-609 Code | e3 |
| Pbfree Code | No |
| Part Status | Active |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Number of Terminations | 56 |
| Termination | SMD/SMT |
| ECCN Code | EAR99 |
| Additional Feature | Also Requires 3.3V Supply |
| Max Power Dissipation | 680mW |
| Voltage - Supply | 1.71V to 1.96V |
| Terminal Position | QUAD |
| Terminal Form | No Lead |
| Peak Reflow Temperature (°C) | 260 |
| Supply Voltage | 1.8V |
| Terminal Pitch | 0.5mm |
| Frequency | 500MHz |
| Time @ Peak Reflow Temp (s) | 30 |
| Base Part Number | AD9959 |
| Pin Count | 56 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 1.8V |
| Interface | Serial |
| Operating Supply Current | 180mA |
| Nominal Supply Current | 160mA |
| Max Supply Current | 185mA |
| uPs/uCs/Peripheral ICs Type | |
| Number of Bits | 10 |
| Sampling Rate | 500 Msps |
| Boundary Scan | No |
| Low Power Mode | Yes |
| Conversion Rate | 500 Msps |
| Number of D/A Converters | 4 |
| Resolution (Bits) | 10 b |
| Tuning Word Width (Bits) | 32 b |
| Height | 830μm |
| Length | 8mm |
| Width | 8mm |
| REACH SVHC | No SVHC |
| RoHS Status | ROHS3 Compliant |
| Lead Free | Contains Lead |
The AD9959 provides four synchronized direct digital synthesizer (DDS) channels, all operating at up to 500 MSPS. This lets you generate precise signals across multiple channels while maintaining synchronization, which is especially useful when working on projects requiring multiple outputs working together smoothly.
Each of the four DDS channels offers independent control over frequency, phase, and amplitude. This allows you to fine-tune each channel to suit different needs, giving you flexibility in handling various signal parameters.
The AD9959 ensures that changes in frequency, phase, and amplitude are synchronized across channels. This means when you adjust one parameter, the change happens simultaneously on all channels, helping you maintain consistent outputs without lag.
With over 65 dB of channel-to-channel isolation, the AD9959 minimizes interference between channels. This ensures that the signals generated on each channel are clean and distinct, providing a higher quality performance in your designs.
The AD9959 supports linear frequency, phase, and amplitude sweeping. This feature allows you to smoothly transition between values, making it easier to generate signals that gradually change over time, which can be useful for testing and calibration purposes.
The device can handle up to 16 levels of modulation for frequency, phase, or amplitude. This level of flexibility enables you to implement a variety of modulation schemes, from simple to complex, depending on your project needs.
Each channel comes with its own integrated 10-bit DAC, allowing you to convert digital signals into analog outputs with precision. This makes the AD9959 a great choice when you need accurate analog signal generation in a compact form.
You can program the full-scale current for each DAC individually, which gives you control over the output power of each channel. This level of customization allows you to optimize the power level for different channels based on your specific requirements.
The AD9959 offers a tuning resolution of 0.12 Hz or better, providing precise control over the frequency of the signals you generate. This level of accuracy is beneficial when working on applications where small frequency adjustments make a big difference.
With 14-bit phase offset resolution, the AD9959 lets you fine-tune the phase of each channel. This feature is helpful when you need exact phase adjustments between signals, such as when aligning multiple signals in phased-array systems.
The AD9959 provides 10-bit output amplitude scaling resolution. This allows you to adjust the output amplitude with high precision, giving you the flexibility to control the signal strength more accurately.
The serial I/O port interface (SPI) offers enhanced data throughput, allowing you to transfer data quickly and efficiently between the device and your system. This speeds up communication, which can be useful in fast-paced applications.
The AD9959 includes both software and hardware options for powering down, giving you control over how and when to save power. This feature is particularly useful in energy-conscious designs where power efficiency is a priority.
The device operates with a dual supply system: 1.8 V for the DDS core and 3.3 V for the serial I/O. This configuration helps balance performance with power needs, making it adaptable to various design environments.
The AD9959 supports synchronization across multiple devices, allowing you to expand your design with additional units while maintaining precise timing between them. This makes it easier to scale your projects without losing synchronization.
With a selectable REFCLK multiplier ranging from 4× to 20×, the AD9959 offers flexibility in clocking options, allowing you to choose the best setting for your design.
The device includes a built-in REFCLK crystal oscillator, which simplifies your design process by reducing the need for external components, making it easier to manage timing within the system.
The AD9959 comes in a 56-lead LFCSP package, providing a compact and space-saving option for integrating multiple DDS channels into your design. This small form factor is ideal when you need high functionality without taking up too much board space.
The AD9959 is well-suited for use in agile local oscillators, providing precise control over frequency, phase, and amplitude. This makes it a great option when you need flexible and adjustable signal generation in radio systems or other communications equipment.
In phased array radar and sonar systems, precise synchronization of multiple signal channels is critical. The AD9959’s ability to handle independent control and synchronization across multiple channels makes it a perfect fit for these applications, ensuring accurate signal processing and timing.
The AD9959 can be used in various types of instrumentation, particularly in devices that require precise signal generation and control. Whether it's for testing, measuring, or calibrating systems, the device's flexibility in adjusting frequency, phase, and amplitude adds versatility to your designs.
For projects that need synchronized clocking across multiple channels, the AD9959 offers an excellent solution. Its built-in synchronization features allow you to maintain exact timing between channels, making it ideal for systems where timing accuracy is crucial.
The AD9959 can act as an RF source for Acousto-Optic Tunable Filters (AOTF), providing reliable and precise signal generation for these optical systems. Its flexibility in frequency and amplitude control allows it to meet the demands of such specialized applications.


Analog Devices has been a leading company in creating integrated circuits since 1965. The company specializes in designing and producing circuits that help convert, condition, and process signals from the real world—like temperature, sound, and motion—into electrical signals. These circuits are used in a wide range of electronic systems across the globe.
The AD9959 contains four direct digital synthesizer (DDS) cores, each allowing independent control of frequency, phase, and amplitude on its respective channel. This flexibility can help you balance out any inconsistencies in signals caused by analog processes like filtering, amplification, or layout differences on the PCB.
The AD9959 can modulate frequency, phase, or amplitude (using FSK, PSK, or ASK modulation) with up to 16 distinct levels. You control this modulation by applying signals to the profile pins, which allows the chip to switch between different modulation levels as needed.
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