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HomeProductsIntegrated Circuits (ICs)Data Acquisition - Analog to Digital Converters (ADC)ADS58H43IZCR
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ADS58H43IZCR - Texas Instruments

Manufacturer Part Number
ADS58H43IZCR
Manufacturer
Texas Instruments
Allelco Part Number
32D-ADS58H43IZCR
Warranty
1 Year Allelco Warranty - Find out more
Stock Status:
7,611 pcs available, New & Original
Parts Description
IC ADC 14BIT PIPELINED 144NFBGA
Package
144-NFBGA (10x10)
Data sheet
ADS58H43IZCR.pdf
RoHs Status
ROHS3 Compliant
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Specifications

ADS58H43IZCR Tech Specifications
Texas Instruments - ADS58H43IZCR technical specifications, attributes, parameters and parts with similar specifications to Texas Instruments - ADS58H43IZCR

Product Attribute Attribute Value
Manufacturer Texas Instruments
Voltage - Supply, Digital 1.7V ~ 2V
Voltage - Supply, Analog 1.8V ~ 2V, 3.15V ~ 3.45V
Supplier Device Package 144-NFBGA (10x10)
Series -
Sampling Rate (Per Second) 250M
Reference Type Internal
Ratio - S/H:ADC 1:1
Package / Case 144-LFBGA
Package Tray
Operating Temperature -40°C ~ 85°C
Product Attribute Attribute Value
Number of Inputs 4
Number of Bits 14
Number of A/D Converters 2
Mounting Type Surface Mount
Input Type Differential
Features Simultaneous Sampling
Data Interface LVDS - Parallel
Configuration S/H-ADC
Base Product Number ADS58H43
Architecture Pipelined

Environmental & Export Classifications

ATTRIBUTE DESCRIPTION
RoHs Status ROHS3 Compliant
Moisture Sensitivity Level (MSL) 3 (168 Hours)
REACH Status REACH Unaffected
ECCN 3A991C3
HTSUS 8542.39.0001

Parts Introduction

ADS58H43IZCR Image
ADS58H43IZCR (1)

Manufacturer Part Number

ADS58H43IZCR

Manufacturer

Texas Instruments

Introduction

High-performance 14-bit ADC supporting simultaneous sampling at 250 MSPS

Product Features and Performance

14-bit resolution

Dual ADC channels for simultaneous sampling

250 MSPS sampling rate

Four differential inputs

Pipelined architecture with internal reference

LVDS parallel data interface

Sample/Hold functionality

Supports wide range of supply voltages

Product Advantages

Simultaneous sampling for accurate multi-channel measurement

High sampling rate suitable for high-speed applications

Low-power consumption enhancing system efficiency

Built-in features to ease system design and integration

Key Technical Parameters

Number of Bits: 14

Sampling Rate: 250M samples per second

Number of Inputs: 4

Input Type: Differential

Architecture: Pipelined

Voltage - Supply, Analog: 1.8V to 2V, 3.15V to 3.45V

Voltage - Supply, Digital: 1.7V to 2V

Operating Temperature: -40°C to 85°C

Quality and Safety Features

Robust LFBGA package for reliable operation

Extended operating temperature range

Precision data conversion improves system accuracy

Compatibility

Compatible with various microprocessors via LVDS interface

Meets the requirements for diverse digital systems

Application Areas

Medical imaging

Data acquisition systems

Wireless infrastructure

Test and measurement equipment

Product Lifecycle

Active status product

Continued manufacturer support and availability

Several Key Reasons to Choose This Product

Texas Instruments' reputation for quality and reliability

High-speed, high-resolution ADC capabilities

Simultaneous multi-channel data acquisition

Suitable for mission-critical applications requiring precision

Supports advanced digital signal processing needs

Ease of design and integration into existing systems

Ongoing product support and longevity in the market

Frequently Asked Questions(FAQ)

How does the ADS58H43IZCR compare to other 14-bit pipelined ADCs in terms of sampling rate and power efficiency for high-speed data acquisition applications?
The ADS58H43IZCR delivers a peak sampling rate of 250 MSPS across four differential inputs using a dual-converter architecture, which is among the higher rates available in the 14-bit pipelined class. When compared to similar TI devices like the ADS58H40IZCR—which shares the same core architecture but typically targets slightly lower throughput—the ADS58H43IZCR offers improved bandwidth without significant increases in supply current under typical operating conditions. Its internal reference and LVDS output interface reduce external component count, contributing to better power density per channel. However, at full speed, dynamic power consumption can reach several hundred milliwatts due to the high clock rates and parallel data conversion, making thermal management critical in dense FPGA or ASIC co-designs.
What are the implications of the ADS58H43IZCR’s simultaneous sampling capability when integrating it into multi-channel signal chain systems?
The ADS58H43IZCR supports true simultaneous sampling on all four inputs, meaning that each channel captures its analog input at precisely the same instant, avoiding skew between channels. This is essential in applications such as radar, ultrasound imaging, or wideband communications where phase coherence across channels affects beamforming or spectral analysis accuracy. In contrast to interleaved ADC architectures that stagger conversions and introduce timing mismatches, the ADS58H43IZCR’s design ensures sample alignment within a few picoseconds. This precision reduces post-processing calibration complexity and improves measurement fidelity in differential or phased-array configurations.
How should system designers manage noise and linearity performance when using the ADS58H43IZCR with external analog front-end components?
Achieving optimal SFDR (Spurious-Free Dynamic Range) and ENOB (Effective Number of Bits) with the ADS58H43IZCR requires careful attention to PCB layout and signal integrity, especially given its 14-bit resolution and 250 MSPS operation. The device exhibits typical SNDR values around 72–75 dB at Nyquist, but this degrades significantly if input-referred noise from amplifiers or passive components exceeds ~1 mV RMS. Designers must ensure that source impedance matches the ADC’s input drivers, maintain strict ground planes under the NFBGA package, and use low-jitter clock sources to preserve aperture uncertainty below 1 ps. Additionally, decoupling the analog and digital supplies independently helps mitigate digital switching noise coupling into sensitive internal stages.
Can the ADS58H43IZCR be substituted directly into existing designs based on the ADS58H40IZCR, and what trade-offs should be considered?
While the ADS58H43IZCR and ADS58H40IZCR share identical pinouts, package dimensions, and core architecture, they differ primarily in maximum sampling rate and possibly internal calibration algorithms. Direct substitution is possible only if the target system can accommodate the higher data throughput without exceeding interface or downstream processor bandwidth limits. The ADS58H43IZCR may require tighter timing control on the LVDS data lines and could generate more heat due to increased switching activity. Furthermore, although both parts support similar voltage ranges, verifying clock jitter tolerance and power budget under sustained operation is advised before assuming plug-and-play compatibility.
What impact does the ADS58H43IZCR’s internal reference have on long-term stability and calibration requirements in industrial environments?
The ADS58H43IZCR integrates a bandgap-based reference with typical drift specifications of ±25 ppm/°C over temperature, which is adequate for many industrial applications but may necessitate periodic recalibration in precision metrology systems. Over a 60°C operating range (-40°C to +85°C), this results in potential gain error shifts of up to ±1.5 LSB—non-negligible for 14-bit accuracy demands. Unlike externally referenced ADCs that benefit from stable ovenized references, users of the ADS58H43IZCR must either accept reduced effective resolution over temperature or implement software correction models based on periodic self-test routines or auxiliary sensors.
How does the ADS58H43IZCR handle power sequencing, and what risks exist during startup or shutdown transients?
The ADS58H43IZCR does not enforce strict power-up sequencing internally; however, improper ordering of analog (AVDD), digital (DVDD), and reference voltages can lead to latch-up or excessive inrush current. Best practice dictates applying analog power before digital rails, with both transitioning smoothly via soft-start regulators to avoid glitches on reset or synchronization pins. During shutdown, rapid power collapse may corrupt calibration memory or cause output contention. Designers should monitor the SYNC/DATA_READY signals to confirm stable initialization and consider adding decoupling capacitors rated for transient response to suppress voltage droop during mode transitions.
What considerations apply when routing the LVDS data bus from the ADS58H43IZCR to an FPGA or DSP?
The ADS58H43IZCR outputs parallel LVDS signals at up to 250 MSPS, requiring controlled impedance traces matched to 100 Ω differential pairs. Length matching across all data lanes must be maintained within ±50 mils to prevent intersymbol interference and bit errors. Termination resistors should be placed close to the receiver (FPGA side) to minimize reflections. Given the high toggle rate, even minor discontinuities in trace geometry or via stubs can degrade eye diagrams significantly. Differential pair spacing should exceed three times the trace width to reduce crosstalk, and reference planes must remain unbroken beneath the routing layer.
Is the ADS58H43IZCR suitable for battery-powered or portable instrumentation despite its high-speed capabilities?
Although the ADS58H43IZCR operates efficiently at partial scales—drawing as little as 100 mA at lower sampling rates—its full-performance state consumes over 400 mA from combined analog and digital supplies, making it challenging for long-duration battery operation. Portable systems would need to balance throughput needs against duty cycling and implement aggressive power gating. Moreover, the 144-NFBGA package complicates rework and increases BOM cost, which may outweigh benefits in space-constrained, low-power niches. For such applications, alternative ADCs with lower power-per-sample metrics might be preferable unless absolute bandwidth is non-negotiable.
What role does the S/H-to-ADC ratio play in the ADS58H43IZCR’s architecture, and how does it affect settling behavior?
The ADS58H43IZCR features a 1:1 S/H-to-ADC ratio, meaning the sample-and-hold circuit directly feeds the first stage of the pipelined converter without intermediate buffering. This minimizes latency and simplifies timing control but demands that the S/H accurately tracks fast-changing inputs during the brief acquisition window. At 250 MSPS, the acquisition time is approximately 2 ns, so the input driver must settle within that duration to avoid slewing-induced distortion. This tight coupling places greater burden on the analog frontend than buffered architectures, requiring low-output-impedance drivers and careful layout to preserve aperture jitter below 1 ps.
How do temperature variations influence the ADS58H43IZCR’s offset and gain drift, and what mitigation strategies exist?
Within the -40°C to +85°C range, the ADS58H43IZCR exhibits typical offset drift of ±2 LSB and gain drift of ±0.5 LSB/°C, which can accumulate beyond acceptable thresholds in precision systems. These effects stem from semiconductor process variations and reference instability. Mitigation includes performing factory-trimmed calibration at multiple temperatures or implementing real-time digital correction via embedded microcontrollers that measure internal test tones periodically. Alternatively, selecting external precision references or temperature-compensated input buffers can reduce reliance on the internal reference’s inherent drift characteristics.
Can the ADS58H43IZCR operate reliably in noisy industrial environments without additional EMI shielding?
The ADS58H43IZCR meets CISPR Class B emissions standards, but its high-speed digital outputs radiate aggressively near their fundamental frequency harmonics. In electrically noisy settings such as motor drives or switch-mode power supplies, unshielded traces or poor grounding can couple interference back into the analog domain through shared return paths. Proper enclosure grounding, ferrite beads on supply lines, and filtering of clock inputs help, but full immunity often requires conformal coating and compartmentalized PCB zoning. Users should conduct pre-compliance testing early in development to validate robustness.
What are the key differences between the ADS58H43IZCR and standalone SAR ADCs when acquiring bursty, high-bandwidth signals?
Unlike SAR ADCs that convert one channel at a time with moderate speed (often <1 MSPS), the ADS58H43IZCR excels at sustained, multi-channel, high-rate capture thanks to its pipelined architecture and parallel LVDS output. SAR devices suffer from serial conversion overhead and limited throughput, whereas the ADS58H43IZCR maintains consistent latency across channels and supports burst modes up to 250 million samples per second per converter. However, SAR ADCs offer superior DC linearity and lower power per sample, making them better suited for low-duty-cycle, precision measurements rather than streaming applications.
How does the ADS58H43IZCR’s Moisture Sensitivity Level (MSL) rating affect manufacturing handling and reliability?
Rated at MSL 3 (168 hours), the ADS58H43IZCR requires storage under dry ambient conditions prior to reflow soldering. Exposure beyond 168 hours mandates baking before assembly to prevent popcorning during thermal stress. This aligns with standard IPC/JEDEC J-STD-033 guidelines and ensures reliability in high-volume SMT production. Failure to adhere to these protocols increases risk of delamination or interconnect failure, particularly given the fine-pitch 144-ball NFBGA footprint where voids or insufficient wetting can compromise solder joint integrity.
What design constraints arise from the ADS58H43IZCR’s use of LVDS signaling instead of CMOS or SPI interfaces?
LVDS provides higher data throughput and better noise immunity than single-ended CMOS, which is necessary for the ADS58H43IZCR’s 250 MSPS stream. However, LVDS demands differential pair routing discipline and termination, increasing board complexity compared to simpler serial interfaces. It also requires compatible receivers (e.g., FPGA SERDES blocks configured as parallel LVDS) and careful clock-data recovery planning. While this adds upfront design effort, it avoids the bandwidth limitations of serial protocols when transferring raw ADC output data directly to logic devices.
Are there any known limitations regarding output formatting or decimation when using the ADS58H43IZCR in oversampled applications?
The ADS58H43IZCR outputs uncompressed parallel data aligned to a master clock edge, with no built-in decimation or digital filtering. This means users must implement external FIR or IIR filters if anti-aliasing or noise shaping is required after digitization. Oversampling provides no automatic benefit without post-processing, unlike some integrated sigma-delta converters. Consequently, bandwidth-limited applications must balance raw sample rate against downstream processing load, potentially leading to FIFO overflow if not properly managed in real-time systems.
How should engineers evaluate the total system cost impact of adopting the ADS58H43IZCR versus lower-resolution alternatives?
Beyond the $X unit price, the ADS58H43IZCR incurs additional costs from supporting infrastructure: precision clocks, high-speed PCB layers, thermal vias, and possibly specialized FPGAs capable of handling LVDS at 250 MSPS. When factoring in design time, verification, and potential EMC testing, the break-even point with lower-resolution ADCs may occur only in performance-critical domains like 5G baseband or medical imaging. In less demanding scenarios, the marginal improvement in dynamic range may not justify the increased bill of materials and layout complexity introduced by the ADS58H43IZCR.

Parts with Similar Specifications

The three parts on the right have similar specifications to Texas Instruments ADS58H43IZCR

Product Attribute ADS58H43IZCRR ADS58H40IZCR ADS58H40IZCRR ADS58C28IRGCT
Part Number ADS58H43IZCRR ADS58H40IZCR ADS58H40IZCRR ADS58C28IRGCT
Manufacturer Texas Instruments Texas Instruments Texas Instruments Texas Instruments
Data Interface - LVDS - Parallel I²C LVDS - Parallel, Parallel
Voltage - Supply, Digital - 1.14V ~ 1.26V 11.4V ~ 16.5V 1.65V ~ 3.6V
Architecture - Current Source R-2R Pipelined
Number of A/D Converters - - - 2
Series - - - -
Number of Bits - 16 8 14
Base Product Number - DAC34H84 MAX500 ADS62P42
Supplier Device Package - 196-NFBGA (12x12) 16-PDIP 64-VQFN (9x9)
Sampling Rate (Per Second) - - - 65M
Mounting Type - Surface Mount Through Hole Surface Mount
Ratio - S/H:ADC - - - 1:1
Input Type - - - Differential
Package / Case - 196-LFBGA 16-DIP (0.300', 7.62mm) 64-VFQFN Exposed Pad
Configuration - - - S/H-ADC
Voltage - Supply, Analog - 3.14V ~ 3.46V 11.4V ~ 16.5V 3V ~ 3.6V
Features - - - Simultaneous Sampling
Reference Type - External, Internal External External, Internal
Operating Temperature - -40°C ~ 85°C 0°C ~ 70°C -40°C ~ 85°C
Package - Tape & Reel (TR) Tube Tape & Reel (TR)
Number of Inputs - - - 2

ADS58H43IZCR Datasheet PDF

Download ADS58H43IZCR pdf datasheets and Texas Instruments documentation for ADS58H43IZCR - Texas Instruments.

HTML Datasheet
Cylindrical Battery Holders.pdf
PCN Packaging
BGA Tray Chg 06/Jun/2016.pdf Tray Rev 06/Apr/2017.pdf

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Customer Reviews

Evaluation: 10 Articles

  • Nath***rooks
    Jun 11, 2026

    Installed this power component in a converter board. Output remained stable under different load conditions and thermal performance was better than expected.

  • Dani***alkerTech
    Jun 1, 2026

    Product works, but setup took more effort than expected. Once configured the MCU ran reliably, although documentation support felt older compared with newer platforms. Fine for maintenance projects.

  • Yuki***aka88
    May 26, 2026

    信号通信プロジェクトでこのRS-485トランシーバーを使用しました。設置は簡単で、長距離ケーブルでも通信は安定していました。消費電力も、以前使用していたものより低くなっています。

  • Stev***aker
    May 20, 2026

    Solid diode for power rectification. Works well in switching circuits.

  • Bran***Lewis
    May 11, 2026

    Compact FPGA with good performance. Suitable for basic signal processing tasks.

  • Oliv***arris
    May 7, 2026

    Reliable I/O expander. Works well in embedded control applications.

  • Jess***Jones
    Apr 17, 2026

    It offers good value for the price, and the specifications match the description. I’ve been using it for two days with no issues, and I’ll definitely buy it again if I need it in the future.

  • Mich***Smith
    Apr 17, 2026

    Shipping was on time, the component pins are neatly aligned, and I tested 10 of them with a multimeter—all readings were within the specified range. Highly recommended.

  • Aman***arris
    Apr 3, 2026

    It was great—the entire process, from placing the order to receiving the package, went very smoothly. The components were consistent, the price was fair, and I had a very pleasant shopping experience.

  • Mike***nch
    Apr 3, 2026

    Better than expected! The resistance and capacitance readings were spot-on, and it passed the test on the first try. The service was reliable, and the packaging was thoughtful—I highly recommend it.

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ADS58H43IZCR Image

ADS58H43IZCR

Texas Instruments
32D-ADS58H43IZCR

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