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HomeProductsIntegrated Circuits (ICs)Embedded - MicrocontrollersSTM32L063R8T6
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STM32L063R8T6 - STMicroelectronics

Manufacturer Part Number
STM32L063R8T6
Manufacturer
STMicroelectronics
Allelco Part Number
32D-STM32L063R8T6
Warranty
1 Year Allelco Warranty - Find out more
Stock Status:
10,524 pcs available, New & Original
Parts Description
IC MCU 32BIT 64KB FLASH 64LQFP
Package
64-LQFP (10x10)
Data sheet
STM32L063R8T6.pdf
RoHs Status
ROHS3 Compliant
Our certification
In stock: 10524
  • Unit Price: $7.626
  • Subtotal: $0.00

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10+ $6.769 $67.69
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Specifications

STM32L063R8T6 Tech Specifications
STMicroelectronics - STM32L063R8T6 technical specifications, attributes, parameters and parts with similar specifications to STMicroelectronics - STM32L063R8T6

Product Attribute Attribute Value
Manufacturer STMicroelectronics
Voltage - Supply (Vcc/Vdd) 1.65V ~ 3.6V
Supplier Device Package 64-LQFP (10x10)
Speed 32MHz
Series STM32L0
RAM Size 8K x 8
Program Memory Type FLASH
Program Memory Size 64KB (64K x 8)
Peripherals Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Package / Case 64-LQFP
Package Tray
Product Attribute Attribute Value
Oscillator Type Internal
Operating Temperature -40°C ~ 85°C (TA)
Number of I/O 51
Mounting Type Surface Mount
EEPROM Size 2K x 8
Data Converters A/D 16x12b; D/A 1x12b
Core Size 32-Bit Single-Core
Core Processor ARM® Cortex®-M0+
Connectivity I²C, IrDA, SPI, UART/USART, USB
Base Product Number STM32L063

Environmental & Export Classifications

ATTRIBUTE DESCRIPTION
RoHs Status ROHS3 Compliant
Moisture Sensitivity Level (MSL) 3 (168 Hours)
REACH Status REACH Unaffected
ECCN 5A992C
HTSUS 8542.31.0001

Parts Introduction

STM32L063R8T6 Image
STM32L063R8T6 (1)

Manufacturer Part Number

STM32L063R8T6

Manufacturer

STMicroelectronics

Introduction

A 32-bit ARM Cortex-M0+ microcontroller suitable for a wide range of applications, particularly in the low-power and energy-efficient product segment.

Product Features and Performance

ARM Cortex-M0+ core technology

32-bit single-core with a maximum clock speed of 32MHz

Low-power energy-efficient operations

Multi-channel direct memory access (DMA)

Integrated liquid-crystal display (LCD) controller

Pulse-width modulation (PWM) for motor and LED control

Product Advantages

Optimized for low power consumption

High integration with multiple communication interfaces

Robust peripheral set for versatile applications

Enhanced electrostatic discharge (ESD) protection

Wide voltage supply range for flexible power sources

STM32L063R8T6 Image
STM32L063R8T6 (2)

Key Technical Parameters

Core Processor: ARM Cortex-M0+

Speed: 32MHz

Number of I/O: 51

Program Memory: 64KB FLASH

EEPROM: 2KB

RAM: 8KB

Data Converters: 16x12-bit A/D, 1x12-bit D/A

Voltage Supply Range: 1.65V to 3.6V

Operating Temperature Range: -40°C to 85°C

Quality and Safety Features

Brown-out detect/reset to prevent improper operation

Programmable watchdog timer (WDT) for system reliability

Protection against unexpected resets (POR)

Compliance with industrial standards for quality and reliability

Compatibility

Full compatibility with the STM32 family

Interfaces include I2C, IrDA, SPI, UART/USART, and USB

Surface mount 64-LQFP package for PCB design flexibility

Internal oscillator to reduce external component count

Application Areas

Consumer electronics

Industrial automation

Battery-operated devices

Internet of Things (IoT) endpoints

Energy management systems

Product Lifecycle

Product status is active

Not near discontinuation

Support and documentation available for long-term projects

Several Key Reasons to Choose This Product

Highly efficient ARM Cortex-M0+ processor enables complex tasks at low energy costs

Flexible peripheral support caters to a diverse set of application needs

Comprehensive support for connectivity options enhances interfacing capabilities

Extended temperature range makes the device suitable for harsh environments

STMicroelectronics' reputation for robustness and quality in microcontroller production

Frequently Asked Questions(FAQ)

What are the key performance trade-offs when selecting the STM32L063R8T6 for low-power battery-operated applications, and how do its power modes compare to similar Cortex-M0+ devices?
The STM32L063R8T6 offers exceptional power efficiency with deep sleep current consumption as low as 500 nA in standby mode, making it ideal for battery-powered systems. However, this ultra-low-power performance comes with a trade-off in maximum operating frequency—limited to 32 MHz compared to higher-performance Cortex-M0+ variants that may support up to 48 MHz. When comparing to other STM32L0 series devices, the L063R8T6 provides 64 KB of flash memory and 8 KB RAM, which is sufficient for moderate complexity applications but may require external memory expansion for larger firmware images. Unlike some competing microcontrollers in the same class, it lacks an internal high-speed crystal oscillator, relying solely on internal RC oscillators and external crystals or ceramic resonators, which can impact timing accuracy in precision applications.
How does the STM32L063R8T6 handle voltage scaling and brown-out detection, and what design considerations are necessary for stable operation across its full supply range of 1.65V to 3.6V?
The STM32L063R8T6 implements dynamic voltage scaling through its integrated Power Control (PWR) peripheral, allowing automatic adjustment of core voltage based on performance requirements. Brown-out reset functionality is provided via the programmable Brown-Out Reset (BOR) circuit with four threshold levels (from 1.7V to 2.9V), ensuring system recovery during undervoltage conditions. For stable operation across the full 1.65V–3.6V range, designers must ensure adequate decoupling capacitance—typically 100 nF ceramic capacitors placed close to each VDD/VSS pin—and implement proper PCB layout practices to minimize noise coupling. The device’s internal voltage regulator allows operation down to 1.65V, but analog peripherals such as the 16-channel 12-bit ADC have reduced performance below 2.0V supply, necessitating careful consideration of signal chain calibration and reference voltage stability.
In what scenarios would the STM32L063R8T6 be preferable over the STM32L062K8U6, and vice versa, considering their differing package types and pin counts?
The STM32L063R8T6 features a 64-pin LQFP package with 51 I/O pins, offering greater flexibility for complex peripheral interfacing compared to the STM32L062K8U6’s 32-pin UFQFPN package with 28 I/Os. This makes the L063R8T6 suitable for applications requiring multiple communication interfaces—such as simultaneous USB, UART, and SPI connections—or extensive GPIO utilization. Conversely, the L062K8U6 is more appropriate for space-constrained designs where minimal footprint and lower pin count suffice. Although both share identical core specifications (32MHz Cortex-M0+, 64KB flash), the L063R8T6 supports additional peripherals like IrDA and I2S due to its higher pin availability. Designers should evaluate board real estate, thermal dissipation needs, and routing complexity when choosing between these variants.
What are the implications of using the STM32L063R8T6’s internal oscillators versus an external crystal for time-critical applications, and how does this affect clock accuracy and startup time?
The STM32L063R8T6 includes three internal oscillators: a 16 MHz high-speed RC oscillator (±1% at 30°C), a 37 kHz low-power RC oscillator, and a 32.768 kHz watch crystal oscillator (±500 ppm). While convenient for reducing BOM cost and board space, these internal oscillators exhibit temperature drift and aging effects that may exceed ±5% over industrial temperature ranges. For applications requiring precise timing—such as USB Full Speed communication or sampled data acquisition—an external 16 MHz crystal paired with load capacitors provides superior stability (<±10 ppm). Startup time from reset is approximately 1 ms with the internal HSI, while an external crystal requires several milliseconds due to PLL lock time, impacting wake-up latency in ultra-low-power systems. Designers must weigh convenience against timing precision when selecting the clock source.
How does the STM32L063R8T6’s USB peripheral implementation compare to dedicated USB MCUs, and what limitations exist when implementing USB CDC or MSC classes?
The STM32L063R8T6 integrates a Full-Speed USB 2.0 interface without PHY, requiring an external ULPI-compatible transceiver or passive components for D+/D- line termination. Unlike some STM32F0/F4 series parts with embedded USB transceivers, this design increases BOM cost but maintains low power consumption. Implementing USB CDC (Virtual COM Port) is straightforward using ST’s standard peripheral library, but MSC (Mass Storage Class) requires careful handling of block addressing and sector management due to the lack of dedicated DMA channels optimized for bulk transfers. Additionally, USB enumeration consumes ~1.5 mA during active operation, which may be prohibitive in strictly energy-scavenging applications. Firmware must also manage USB suspend/resume states correctly to comply with USB specifications and avoid bus resets.
What memory architecture considerations should guide firmware development for the STM32L063R8T6, especially regarding flash programming and EEPROM emulation?
The STM32L063R8T6 employs a 64 KB unified flash memory space without separate program and data sections, unlike Harvard architectures with split caches. Flash writes require erase-before-write operations, limiting write endurance to ~10k cycles per page (typically 2 KB). For persistent non-volatile storage beyond flash lifetime constraints, EEPROM emulation must be implemented in software using designated flash sectors, which incurs overhead in write latency and code complexity. The 2 KB internal EEPROM (if available in specific package variants) offers faster access but is not present in all configurations—designers should verify part-specific features. RAM is limited to 8 KB, requiring efficient data structure design and avoidance of large stack allocations to prevent corruption during interrupt service routines.
How does the STM32L063R8T6’s ADC performance degrade under varying supply voltages, and what compensation techniques improve measurement accuracy?
The 16-channel 12-bit SAR ADC in the STM32L063R8T6 exhibits significant gain error and offset variation below 2.0V supply voltage. At 1.8V, typical effective resolution drops to 10 bits due to degraded comparator linearity and reference buffer performance. Temperature coefficients increase by approximately 0.5 LSB/°C above 60°C, necessitating periodic calibration routines. To mitigate these effects, users can implement internal voltage reference switching (VREFINT) for consistent comparisons, apply moving average filtering in firmware, or use external precision references like the ADR4520. Calibration registers allow trimming of offset and gain errors, but only once per device during manufacturing. For critical measurements, differential inputs should be preferred over single-ended to reject common-mode noise amplified by the input buffer.
What are the thermal and packaging limitations of the STM32L063R8T6 in compact designs, and how does the 64-LQFP (10x10) package influence heat dissipation?
The STM32L063R8T6 dissipates up to 120 mW under normal operation at 32 MHz and 3.3V supply, generating minimal self-heating in most applications. However, in dense PCB layouts with limited airflow, junction temperatures can rise rapidly due to poor copper pour on adjacent layers. The 64-LQFP (10x10) package has a thermal pad underside connected to VSS, enabling modest heat spreading but not suitable for high-current analog loads or continuous RF transmission. Maximum junction temperature is rated at 150°C, but long-term reliability degrades significantly above 85°C ambient. Designers should allocate sufficient ground plane area beneath the IC and avoid placing high-impedance traces near sensitive analog inputs to prevent coupling of thermal gradients into measurement circuits.
How does the STM32L063R8T6’s watchdog timer configuration differ from other STM32L0 series devices, and what are the risks of misconfiguration in safety-critical systems?
The STM32L063R8T6 includes two independent watchdogs: the Window Watchdog (IWDG) with programmable window boundaries and the Independent Watchdog (WWDG) operating off the internal 37 kHz RC oscillator. Misconfiguring the WWDG window size can cause premature resets if firmware takes longer than expected to service the peripheral, while incorrect IWDG prescaler settings may disable the watchdog entirely if loaded too slowly. Unlike some STM32F series devices with hardware CRC modules, the L0 series lacks built-in fault detection for memory corruption, increasing reliance on software-based stack canaries or memory guards. In medical or automotive applications, additional external monitoring circuits may be required to meet ISO 26262 or IEC 62304 standards, as the internal watchdogs alone do not provide functional safety certification.
Can the STM32L063R8T6 operate reliably in harsh environments with rapid temperature transitions, and what layout practices enhance robustness?
The STM32L063R8T6 is qualified for operation from -40°C to +85°C, but rapid thermal cycling induces mechanical stress on solder joints and PCB laminate, potentially causing latent failures. To enhance robustness, designers should use low-CTE (coefficient of thermal expansion) substrates, avoid placing vias directly under the IC, and employ conformal coating selectively to prevent dendritic growth without trapping moisture. Decoupling capacitors must be rated for the full temperature range, and bypassing should follow the “star topology” with one capacitor per power rail near the IC. Signal integrity on high-speed lines (e.g., USB D+/D-) becomes critical during cold starts, as trace impedance shifts with temperature; controlled impedance routing and matched terminations improve signal fidelity across the operational envelope.
What cryptographic capabilities, if any, are supported by the STM32L063R8T6, and how can secure boot or firmware protection be achieved?
The STM32L063R8T6 does not include dedicated cryptographic hardware such as AES, TRNG, or PKA accelerators found in higher-end STM32 families like the L4 or G0 series. Software-based encryption using AES-NI-like algorithms runs inefficiently on the Cortex-M0+ core, consuming excessive CPU cycles and power. Secure boot requires manual implementation of signature verification using public-key cryptography, typically RSA-2048 or ECDSA, which demands substantial flash and RAM resources. Firmware protection relies primarily on the RDP (Readout Protection) level 1 and 2 features, though these can be circumvented by skilled attackers with physical access. For true security, external secure elements like the STSAFE-A110 or ATECC608B are recommended to offload cryptographic operations and store secrets safely.
How does the STM32L063R8T6’s DMA controller handle peripheral-to-memory transfers, and what are its bandwidth limitations for real-time data logging?
The STM32L063R8T6 features a 7-channel DMA controller supporting memory-to-peripheral, peripheral-to-memory, and memory-to-memory transfers. Each channel can be assigned to specific peripherals including ADC, UART, SPI, and I2C, but operates at a maximum theoretical bandwidth of 1 MB/s due to the 32-bit AHB bus width and 32 MHz clock. In practice, effective throughput for burst transfers is limited by flash wait states and arbitration delays, especially during concurrent accesses to flash memory for instruction fetches. For continuous ADC sampling at 1 MSPS across 16 channels, the DMA must transfer 2 bytes per sample every 62.5 ns, which exceeds the L0’s capabilities without oversampling or compression. Designers should prioritize critical peripherals, use double-buffering techniques, and consider reducing ADC resolution or sampling rate to match DMA capacity.
What are the differences between the STM32L063R8T6 and the STM32L152RETx in terms of power consumption and peripheral set, and why might one choose the L0 over the L1 despite lower performance?
The STM32L063R8T6 consumes significantly less power in active mode (~250 µA/MHz) compared to the STM32L152RETx (~180 µA/MHz at 32 MHz), but achieves lower peak performance due to its 32 MHz vs. 32 MHz nominal speed with higher voltage scaling flexibility. Crucially, the L0 series omits advanced peripherals like LCD controllers and CAN FD present in the L1, making it unsuitable for display-driven or automotive networks. However, the L0 offers better ultra-low-power modes (down to 500 nA in standby), smaller package options, and lower cost—making it ideal for wearables or IoT sensors. The L0’s absence of an internal high-speed crystal oscillator further reduces component count, whereas the L1 supports HSE for precise timing. Choice depends on application profile: ultra-low power with moderate complexity favors the L063R8T6; high-throughput industrial control benefits from the L152RETx.
How does the STM32L063R8T6’s I2C peripheral handle clock stretching and arbitration, and what pitfalls occur in multi-master bus designs?
The STM32L063R8T6’s I2C module supports standard-mode (100 kbps) and fast-mode (400 kbps) operation with full clock stretching and arbitration capabilities per SMBus specifications. In multi-master environments, improper handling of arbitration loss interrupts can lead to bus hangs if secondary masters fail to reacquire the bus after contention. Common pitfalls include neglecting pull-up resistor values (typically 4.7 kΩ for 3.3V systems), which causes signal rise times exceeding protocol limits and increases collision probability. Additionally, the L0’s I2C lacks built-in timeout mechanisms, so firmware must monitor SCL/SDA lines or use external supervisors to recover from deadlocks. Unlike some modern MCUs with clock synchronization features, the L0 assumes synchronous operation, making it vulnerable to skew in long busses or noisy industrial settings unless shielded cables and proper grounding are used.
What are the flash programming constraints when using the STM32L063R8T6 with ST-LINK debug probes, and how do erase/write latencies impact real-time system responsiveness?
The STM32L063R8T6 requires mass erase or page-by-page erasure before writing, with each 2 KB page taking approximately 25 ms to erase and 10 ms to program. During flash operations, the CPU halts execution due to bus contention, causing unacceptable latency in hard real-time systems. Debuggers like ST-LINK V2/V3 enforce these constraints automatically but cannot modify flash without stopping the core. To maintain system availability during updates, designers often reserve a portion of flash as a bootloader area and perform background updates via DMA or interrupt-driven routines—though this adds complexity. Alternatives include using external serial flash chips with QSPI interfaces, but this increases BOM cost and PCB layer count. The L0’s lack of dual-bank flash architecture further limits concurrent execution and update capabilities compared to newer STM32 families.
How does the STM32L063R8T6’s PWM module support motor control applications, and what resolution limits exist for closed-loop feedback?
The STM32L063R8T6 includes two general-purpose timers capable of generating PWM signals with up to 16-bit resolution, supporting complementary outputs and dead-time insertion for half-bridge motor drivers. However, timer resolution is shared among multiple channels, limiting independent control to two motors or one motor with auxiliary functions. For BLDC motor control, phase commutation requires precise synchronization between encoder inputs and PWM generation, achievable only through timer capture/compare units. The maximum PWM frequency is constrained by timer prescaler settings and CPU load, typically reaching 50 kHz for 16-bit resolution but dropping to <10 kHz if ADC sampling interrupts occur frequently. Without hardware quadrature decoding or FOC acceleration, torque ripple and efficiency suffer at high speeds. Designers must balance PWM frequency, resolution, and ISR overhead carefully to avoid instability.
What are the implications of using the STM32L063R8T6 in wireless sensor nodes with Zigbee or BLE connectivity, and how do radio-induced noise effects compromise analog subsystems?
Integrating the STM32L063R8T6 with wireless radios like the NRF24LE1 or ESP32 introduces RF noise coupling through power rails and substrate conduction, degrading analog performance such as ADC linearity and reference stability. The L0’s analog supplies (AVDD, DVDD) must be physically separated from digital domains using ferrite beads and LC filters, yet even minor crosstalk can introduce spurious codes in 12-bit conversions. Furthermore, wireless transmission spikes consume >10 mA pulses that exceed the LDO’s transient response capability, causing brown-out resets if supply bypassing is inadequate. While the L0’s low quiescent current suits battery nodes, coexistence with radios demands careful PCB partitioning, antenna placement away from analog inputs, and firmware scheduling to minimize concurrent operation—often requiring external voltage supervisors or power gating switches.
How does the STM32L063R8T6’s reset circuitry interact with external supervisory ICs, and what failsafes exist for brown-out events missed by internal detection?
The STM32L063R8T6 generates a Power-On Reset (POR) and Brown-Out Reset (BOR) triggered by supply droop below programmed thresholds. However, external supervisory ICs like the TPS3839 can provide finer-grained monitoring (down to 1.56V) and push-button-controlled manual resets not replicable in firmware alone. When both internal and external resets are active, the microcontroller responds to the earliest assertion, but coordination requires shared reset signaling through open-drain lines or wired-OR configurations. Missed brown-out events may occur if supply ramps slowly or if noise triggers false positives/negatives; adding hysteresis to external comparators or using ratiometric voltage references improves reliability. In safety-critical deployments, redundant reset chains with periodic self-test routines enhance fault tolerance, though they increase component count and validation effort.

Parts with Similar Specifications

The three parts on the right have similar specifications to STMicroelectronics STM32L063R8T6

Product Attribute STM32L063R8T6TR STM32L063R8T7 STM32L053R8T6D STM32L053R8T6
Part Number STM32L063R8T6TR STM32L063R8T7 STM32L053R8T6D STM32L053R8T6
Manufacturer STMicroelectronics STMicroelectronics STMicroelectronics STMicroelectronics
Connectivity - - - -
Oscillator Type - - - -
Series - - - -
Package / Case - 196-LFBGA 16-DIP (0.300', 7.62mm) 64-VFQFN Exposed Pad
RAM Size - - - -
Supplier Device Package - 196-NFBGA (12x12) 16-PDIP 64-VQFN (9x9)
Program Memory Type - - - -
Speed - - - -
Mounting Type - Surface Mount Through Hole Surface Mount
Core Processor - - - -
Voltage - Supply (Vcc/Vdd) - - - -
Number of I/O - - - -
Data Converters - - - -
Core Size - - - -
Package - Tape & Reel (TR) Tube Tape & Reel (TR)
Operating Temperature - -40°C ~ 85°C 0°C ~ 70°C -40°C ~ 85°C
EEPROM Size - - - -
Peripherals - - - -
Base Product Number - DAC34H84 MAX500 ADS62P42
Program Memory Size - - - -

STM32L063R8T6 Datasheet PDF

Download STM32L063R8T6 pdf datasheets and STMicroelectronics documentation for STM32L063R8T6 - STMicroelectronics.

PCN Design/Specification
Datasheet Chg 07/Mar/2016.pdf Die redesign/Mask set Chg 23/Feb/2016.pdf
PCN Packaging
2.73KHz.pdf
PCN Assembly/Origin
STM8/STM32 10/Mar/2020.pdf
HTML Datasheet
STM32L0 Series Programming Manual.pdf STM32L063C8, R8 Datasheet.pdf

Customer Reviews

Evaluation: 10 Articles

  • Dani***alkerTech
    Jun 1, 2026

    Product works, but setup took more effort than expected. Once configured the MCU ran reliably, although documentation support felt older compared with newer platforms. Fine for maintenance projects.

  • Yuki***aka88
    May 26, 2026

    信号通信プロジェクトでこのRS-485トランシーバーを使用しました。設置は簡単で、長距離ケーブルでも通信は安定していました。消費電力も、以前使用していたものより低くなっています。

  • Stev***aker
    May 20, 2026

    Solid diode for power rectification. Works well in switching circuits.

  • Bran***Lewis
    May 11, 2026

    Compact FPGA with good performance. Suitable for basic signal processing tasks.

  • Oliv***arris
    May 7, 2026

    Reliable I/O expander. Works well in embedded control applications.

  • Jess***Jones
    Apr 17, 2026

    It offers good value for the price, and the specifications match the description. I’ve been using it for two days with no issues, and I’ll definitely buy it again if I need it in the future.

  • Mich***Smith
    Apr 17, 2026

    Shipping was on time, the component pins are neatly aligned, and I tested 10 of them with a multimeter—all readings were within the specified range. Highly recommended.

  • Aman***arris
    Apr 3, 2026

    It was great—the entire process, from placing the order to receiving the package, went very smoothly. The components were consistent, the price was fair, and I had a very pleasant shopping experience.

  • Mike***nch
    Apr 3, 2026

    Better than expected! The resistance and capacitance readings were spot-on, and it passed the test on the first try. The service was reliable, and the packaging was thoughtful—I highly recommend it.

  • Daic***K.
    Mar 23, 2026

    Very good. No issue after long time testing.

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Electrostatic Discharge Protection and Handling

All electrostatic-sensitive components are handled in accordance with electrostatic discharge control procedures. The products are hermetically sealed in anti-static safe packaging to prevent electrostatic damage. Appropriate labeling is also applied for identification and traceability. This ensures product integrity during storage, handling and transportation.


ESD

Certifications & Memberships

Third-party certified, strict quality control. Our certification
  • ISO 9001: 2015
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STM32L063R8T6 Image

STM32L063R8T6

STMicroelectronics
32D-STM32L063R8T6

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